So as explained in the previous video, our little Z80 CPU only has 16 bit address lines, and that means the maximum memory it can address is 64K. In this video let’s take a look at how memory banking on the 128K Spectrum and the Spectrum Next works, allowing those machines to break through the 64k barrier!
This video is mostly aimed at people trying to program the Spectrum, but how and why this works is sufficiently technical that I hope it’s interesting to more than the five people out there who seem to be programming like this!
The Spectrum +3 has a whole 128K of RAM. At the time this was amazing. They and all other Spectrums are based off a Zilog Z80 CPU. There’s 16 address lines, and 8 data lines. The 8 data lines are what makes this an 8 bit CPU. Inside the CPU those 8 lines go to the registers, each of which are 8 bits wide.
Since there’s 16 address lines, the CPU can address up to 65,536 different locations. And each of those locations can store a single 8 bit number. So 65,536 different locations, each of which stores a single byte gives our CPU 64K of addressable memory. That’s it. 64K is loads, surely we don’t need much more?
So on the 128K Spectrums, how’s the 128K of RAM and 32K of ROM fit inside the 64K of addressable memory the Z80 can see? Magic! No, really, this stuff is proper magic all the magic is inside a chip which on my +3 is a gate array.
You know the ULA on the Spectrum? That all purpose chip that makes the computer a Spectrum? The Gate Array on the +3 is that with extra bits added.
The gate array on the Speccy +3 contains all the logic that was in the ULA, plus a bunch of other logic for bank switching and so on, also defined using logic equations. It’s the same as a bunch of hardware logic gates, just in one cost-reduced package.
It’s sort of the great grandfather of the FPGA in the Next. Except the FPGA on the Next is that plus the CPU and everything else to create the whole machine, described using logic equations.
I know you can describe any logic circuit using an FPGA, but is the reverse true? Can you describe every FPGA circuit using real hardware?
You know, with appropriate tools you can totally reprogram the Next’s hardware to be something different.
The idea is to partition memory up into banks of a certain size, and then let the programmer attach those banks to parts of the CPU’s address space when needed. On the original Spectrums, this was done using 16K banks. On the Spectrum +3 it’s a bit different – they updated the design to allow a bit more flexibility so CP/M could be run…
The Next can do all of that, plus its own much more flexible memory paging. On the Next, you use 8K blocks and can switch in and out of any 8K area of the address space.
We’ll have to be “careful” to the best of our ability to avoid our code growing into the stack if we write too much, or the stack growing down into our code if we use too many function calls at once.
Doing this is left as an exercise for the reader, have fun! I have no idea how to cope with this, and no doubt future me will encounter a stack overflow at some point.
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